How the RISC-V architecture’s inherent traits align with the demands of functional safety standards like ISO 26262.
The Indian Institute of Technology Madras and the Indian Space Research Organisation (ISRO) have developed and booted an ...
IIT Madras and ISRO develop the SHAKTI microprocessor, an indigenous chip for space applications, enhancing command, control, ...
A new technical paper titled “Optimizing Energy Efficiency in Subthreshold RISC-V Cores” was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract “Our goal in ...
The ISRO Inertial Systems Unit (IISU) in Thiruvananthapuram initiated the development of a 64-bit RISC-V-based controller and ...
NCSC CTO Ollie Whitehouse discussed a UK government-backed project designed to secure underlying computer hardware, ...
IIT Madras develops indigenous Shakti semiconductor chip for ISRO, marking a milestone in Make in India efforts.
IIT Madras and the Indian Space Research Organisation developed and successfully booted the indigenous RISCV Controller for Space Application semiconductor chip, advancing India's 'Atmanirbhar Bharat' ...
IIT Madras and ISRO developed and tested the SHAKTI-based IRIS chip for aerospace applications, promoting indigenized ...
CHENNAI: The Indian Institute of Technology - Madras has developed a fully indigenous microprocessor for aerospace ...
Brevis, an off-chain computation engine, has launched Pico v1.0, a new zero-knowledge virtual machine (zkVM), according to ...
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