How the RISC-V architecture’s inherent traits align with the demands of functional safety standards like ISO 26262.

The ISRO Inertial Systems Unit (IISU) in Thiruvananthapuram initiated the development of a 64-bit RISC-V-based controller and ...

A new technical paper titled “Optimizing Energy Efficiency in Subthreshold RISC-V Cores” was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract “Our goal in ...

New Delhi: Indian Institute of Technology (IIT) Madras and ISRO have developed an indigenous microprocessor for space ...

IIT Madras and ISRO have collaboratively developed the SHAKTI microprocessor for space applications. This indigenous chip, based on RISC-V architecture and backed by the Ministry of Electronics, aims ...

IIT Madras develops indigenous Shakti semiconductor chip for ISRO, marking a milestone in Make in India efforts.

IIT Madras and ISRO developed and tested the SHAKTI-based IRIS chip for aerospace applications, promoting indigenized ...

New variants in the u-blox Nora-B2 Bluetooth LE 6.0 module family integrate Nordic’s entire nRF54L series of ultra-low power ...

IIT Madras and ISRO collaborate to develop SHAKTI-based semiconductor chip for indigenous microprocessor products with RISC-V technology.

The UK-based chip designer pivots to selling its own chips, securing Meta as its first major customer, and challenging ...