How the RISC-V architecture’s inherent traits align with the demands of functional safety standards like ISO 26262.

An appendix covers how to write your own operating system for RISC-V in about 1,000 lines of code. Don’t speak Japanese? An English version is available free on the Web and on GitHub.

From the Institute of Computing Technology division of the Chinese Academy of Sciences and Peng Cheng Laboratory comes a high-performance and well-documented RISC-V core called XiangShan.

The RISC-V Mainboard for the Framework Laptop 13 is also available from DeepComputing, which sells as series of kits. Prices ...

Priced at $199 Framework has released a RISC-V motherboard for its 13-inch laptops. The DeepComputing RISC-V motherboard for ...

A new technical paper titled “Optimizing Energy Efficiency in Subthreshold RISC-V Cores” was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract “Our goal in ...

RISC-V ISA (Instruction Set Architecture) is designed in a modular way. It means that the ISA has several groups of instructions (ISA extensions) that can be enabled or disabled as needed. This allows ...

The RISC-V board isn't being offered in a pre-built laptop, but Framework is also introducing a barebones boardless $399 ...

For the uninitiated, RISC-V is an open-source, royalty-free instruction set that anyone can implement without paying licensing fees. It's different from the x86 chips from Intel ...

Discover the $199 RISC-V Mainboard for Framework Laptop 13, a modular platform for developers and open-source enthusiasts.